?002 fairchild semiconductor corporation rfd8p06e, RFD8P06ESM, rfp8p06e rev. b rfd8p06e, RFD8P06ESM, rfp8p06e 8a, 60v, 0.300 ohm, p-channel power mosfets these are p-channel power mosfets manufactured using the megafet process. this process, which uses feature sizes approaching those of lsi integrated circuits gives optimum utilization of silicon, resulting in outstanding performance. they were designed for use in applications such as switching regulators, switching converters, motor drivers, relay drivers and emitter switches for bipolar transistors. these transistors can be operated directly from integrated circuits. the rfd8p06e, RFD8P06ESM and rfp8p06e incorporate esd protection and are designed to withstand 2kv (human body model) of esd. formerly developmental type ta49044. features 8a, 60v ? ds(on) = 0.300 ? temperature compensating pspice model 2kv esd protected peak current vs pulse width curve uis rating curve 175 o c operating temperature related literature - tb334 ?uidelines for soldering surface mount components to pc boards symbol packaging ordering information part number package brand rfp8p06e to-220ab rfp8p06e RFD8P06ESM to-252aa d8p06e rfd8p06e to-251aa d8p06e note: when ordering, use the entire part number. add the suf? 9a to obtain the to-252aa variant in tape and reel, i.e. RFD8P06ESM9a. g d s jedec to-220ab jedec to-251aa jedec to-252aa gate drain (flange) source drain source drain (flange) gate drain drain (flange) gate source data sheet january 2002
?002 fairchild semiconductor corporation rfd8p06e, RFD8P06ESM, rfp8p06e rev. b absolute maximum ratings t c = 25 o c rfd8p06e, RFD8P06ESM, rfp8p06e units drain to source voltage (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v dss -60 v drain to gate voltage (r gs = 20k ? ) (note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v dgr -60 v gate to source voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v gs 20 v continuous drain current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .i d pulsed drain current (note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i dm 8 refer to peak current curve a a single pulse avalanche rating (note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e as refer to uis curve power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p d linear derating factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 0.32 w w/ o c electrostatic discharge rating mil-std-883, category b(2) . . . . . . . . . . . . . . . . . . . .esd 2 kv operating and storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t j , t stg -55 to 175 o c maximum temperature for soldering leads at 0.063in (1.6mm) from case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t l package body for 10s, see techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .t pkg 300 260 o c o c caution: stresses above those listed in ?bsolute maximum ratings may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speci?ation is not implied. note: 1. t j = 25 o c to 150 o c. electrical speci?ations t c = 25 o c, unless otherwise speci?d parameter symbol test conditions min typ max units drain to source breakdown voltage bv dss i d = 250 a, v gs = 0v -60 - - v gate threshold voltage v gs(th) v gs = v ds , i d = 250 a -2.0 - -4.0 v zero gate voltage drain current i dss v ds = rated bv dss , v gs = 0v - - -1.0 a v ds = 0.8 x rated bv dss , t c = 150 o c - - -25 a gate to source leakage current i gss v gs = 20v - - 10 a drain to source on resistance (note 3) r ds(on) i d = 8a, v gs = -10v - - 0.300 ? turn-on time t on v dd = -30v, i d 8a, r l = 3.75 ? , v gs = -10v, r g = 2.5 ? (figure 13) - - 70 ns turn-on delay time t d(on) -15-ns rise time t r -30-ns turn-off delay time t d(off) -40-ns fall time t f -25-ns turn-off time t off - - 100 ns total gate charge q g(tot) v gs = 0 to -20v v dd = -48v, i d = 8a, r l = 6 ? i g(ref) = -1.45ma -3036nc gate charge at 5v q g(-10) v gs = 0 to -10v - 15 18 nc threshold gate charge q g(th) v gs = 0 to -2v - 1.15 1.5 nc input capacitance c iss v ds = -25v, v gs = 0v, f = 1mhz - 600 - pf output capacitance c oss - 160 - pf reverse transfer capacitance c rss -35-pf thermal resistance junction to case r jc figure 12 - - 3.125 o c/w thermal resistance junction to ambient r ja to-220 - - 62 o c/w to-251, to-252 - - 100 o c/w source to drain diode speci?ations parameter symbol test conditions min typ max units source to drain diode voltage v sd i sd = -8a - - -1.5 v diode reverse recovery time t rr i sd = -8a, di sd /dt = -100a/ s - - 125 ns notes: 2. pulse test: pulse width 300 s, duty cycle 2%. 3. repetitive rating: pulse width limited by maximum junction temperature. see transient thermal impedance curve (figure 3). rfd8p06e, RFD8P06ESM, rfp8p06e
?002 fairchild semiconductor corporation rfd8p06e, RFD8P06ESM, rfp8p06e rev.b typical performance curves unless otherwise speci?d figure 1. normalized power dissipation vs case temperature figure 2. maximum continuous drain current vs case temperature figure 3. normalized transient thermal impedance figure 4. forward bias safe operating area figure 5. peak current capability 1.2 1.0 0.8 0.6 0.4 0.2 0 0 25 50 75 100 125 150 175 power dissipation multiplier t c , case temperature ( o c) -4 -8 -2 0 25 50 75 100 125 150 175 i d , drain current (a) t c , case temperature ( o c) -6 -10 1 0.1 0.01 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , rectangular pulse duration (s) z jc , normalized thermal impedance notes: duty factor: d = t 1 /t 2 peak t j = p dm x z jc x r jc + t c p dm t 1 t 2 0.01 0.02 0.05 0.1 0.2 0.5 single pulse -100 -10 -1 -0.1 -1 -10 -100 v ds , drain to source voltage (v) i d , drain current (a) operation in this area may be limited by r ds(on) 100 s 10ms 100ms dc 1ms t c = 25 o c, t j = max rated v gs = -20v v gs = -10v transconductance may limit current in this region for temperatures above 25 o c derate peak current capability as follows: -5 i i 25 175 t c 150 --------------------- ?? ?? ?? = 10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 -10 -10 2 t, pulse width (s) i dm , peak current (a) t c = 25 o c rfd8p06e, RFD8P06ESM, rfp8p06e
?002 fairchild semiconductor corporation rfd8p06e, RFD8P06ESM, rfp8p06e rev. b figure 6. unclamped inductive switching figure 7. saturation characteristics figure 8. transfer characteristics figure 9. normalized drain to source on resistance vs junction temperature figure 10. normalized gate threshold voltage vs temperature figure 11. normalized drain to source breakdown voltage vs temperature typical performance curves unless otherwise speci?d (continued) -30 -10 -1 0.01 0.1 1 10 t av , time in avalanche (ms) i as , avalanche current (a) starting t j = 150 o c starting t j = 25 o c if r = 0 t av = (l) (i as ) / (1.3rated bv dss - v dd ) if r 0 t av = (l/r) ln [(i as *r) / (1.3 rated bv dss - v dd ) + 1] 0 0 -1.5 -3.0 -4.5 -6.0 -7.5 i d , drain current (a) v ds , drain to source voltage (v) v gs = -5v v gs = -6v v gs = -8v v gs = -7v v gs = -10v -5 -10 -15 -20 v gs = -4.5v v gs = -20v pulse duration = 80 s t c = 25 o c duty cycle = 0.5% max 0 -2 -4 -6 -8 -10 v gs , gate to source voltage (v) i ds(on) , drain to source current (a) 0 pulse duration = 250 s duty cycle = 0.5% max -55 o c v dd = -15v 175 o c 25 o c -5 -10 -20 -15 2.0 1.5 1.0 0.5 0 -80 -40 0 40 80 120 160 200 t j , junction temperature ( o c) normalized drain to source 2.5 pulse duration = 80 s v gs = -10v, i d = 8a on resistance duty cycle = 0.5% max 2.0 1.5 1.0 0.5 0 -80 -40 0 40 80 160 120 200 threshold voltage t j , junction temperature ( o c) normalized gate v gs = v ds , i d = 250 a 2.0 1.5 1.0 0.5 0 -80 -40 0 40 80 120 160 200 normalized drain to source breakdown voltage t j , junction temperature ( o c) i d = 250 a rfd8p06e, RFD8P06ESM, rfp8p06e
?002 fairchild semiconductor corporation rfd8p06e, RFD8P06ESM, rfp8p06e rev.b figure 12. capacitance vs drain to source voltage note: refer to fairchild application notes an7254 and an7260. figure 13. normalized switching waveforms for constant gate current test circuits and waveforms figure 14. unclamped energy test circuit figure 15. unclamped energy waveforms figure 16. switching time test circuit figure 17. resistive switching waveforms typical performance curves unless otherwise speci?d (continued) 800 600 400 200 0 0 -5 -10 -15 -20 -25 c, capacitance (pf) v ds , drain to source voltage (v) 1000 c iss c rss c oss v gs = 0v, f = 1mhz v gs = 0v, f = 1mhz c iss = c gs + c gd c rss = c gd c oss c ds + c gs -60 -45 -30 -15 0 -10.0 -7.5 -5.0 -2.5 0.0 20 i g(ref) i g(act) 80 i g(ref) i g(act) t, time ( s) v dd = bv dss v dd = bv dss r l = 1.2 ? i g(ref) = 1.45ma 0.75 bv dss 0.50 bv dss 0.25 bv dss 0.75 bv dss 0.50 bv dss 0.25 bv dss v ds , drain to source voltage (v) v gs , gate to source voltage (v) v gs = -10v 0.01 ? l i as + - v ds v dd r g vary t p to obtain required peak i as dut t p -v gs 0v v dd v ds bv dss t p i as t av 0 r gs r l dut -v gs 0v + - v gs v ds t d(on) t r 90% 10% v ds 90% t f t d(off) t off 90% 50% 50% 10% pulse width v gs t on 10% 0 0 rfd8p06e, RFD8P06ESM, rfp8p06e
?002 fairchild semiconductor corporation rfd8p06e, RFD8P06ESM, rfp8p06e rev. b figure 18. gate charge test circuit figure 19. gate charge waveforms test circuits and waveforms (continued) r l v gs + - v ds v dd dut i g(ref) v dd q g(th) v gs = -2v q g(-10) v gs = -10v q g(tot) v gs = -20v v ds -v gs i g(ref) 0 0 rfd8p06e, RFD8P06ESM, rfp8p06e
?002 fairchild semiconductor corporation rfd8p06e, RFD8P06ESM, rfp8p06e rev.b pspice electrical model .subckt rfp8p06e 2 1 3 rev 6/23/94 ca 12 8 7.24e-10 cb 15 14 8.04e-10 cin 6 8 6.00e-10 dbody 5 7 dbdmod dbreak 7 11 dbkmod desd1 91 9 desd1mod desd2 91 7 desd2mod dplcap 10 6 dplcapmod ebreak 5 11 17 18 -79.2 eds 14 8 5 8 1 egs 13 8 6 8 1 esg 5 10 6 8 1 evto 20 6 8 18 1 it 8 17 1 ldrain 2 5 1e-10 lgate 1 9 2.92e-9 lsource 3 7 2.92e-9 mos1 16 6 8 8 mosmod m=0.99 mos2 16 21 8 8 mosmod m=0.01 rbreak 17 18 rbkmod 1 rdrain 50 16 rdsmod 95.2e-3 rgate 9 20 3.95 rin 6 8 1e9 rscl1 5 51 rsclmod 1e6 rscl2 5 50 1e3 rsource 8 7 rdsmod 143.6e-3 rvto 18 19 rvtomod 1 s1a 6 12 13 8 s1amod s1b 13 12 13 8 s1bmod s2a 6 15 14 13 s2amod s2b 13 15 14 13 s2bmod vbat 8 19 dc 1 vto 21 6 -0.804 escl 51 50 value={(v(5,51)/abs(v(5,51)))*(pwr(v(5,51)*1e6/22,9))} .model dbdmod d (is=4.15e-15 rs=5.54e-2 trs1=-1.32e-3 trs2=-2.48e-6 cjo=6.06e-10 tt=7.50e-8) .model dbkmod d (rs=4.66e-1 trs1=1.58e-3 trs2=-7.49e-6) .model desd1mod d (bv=20.2 tbv1=-1.25e-3 tbv2=5.79e-7 rs=36 nbv=50 ibv=7e-6) .model desd2mod d (bv=25.4 tbv1=-8.3e-4 tbv2=8.9e-7 nbv=50 ibv=7e-6) .model dplcapmod d (cjo=2.49e-10 is=1e-30 n=10) .model mosmod pmos (vto=-3.824 kp=5.163 is=1e-30 n=10 tox=1 l=1u w=1u) .model rbkmod res (tc1=9.48e-4 tc2=-1.42e-7) .model rdsmod res (tc1=5.40e-3 tc2=1.25e-5) .model rsclmod res (tc1=1.75e-3 tc2=3.90e-6) .model rvtomod res (tc1=-3.55e-3 tc2=-3.43e-6) .model s1amod vswitch (ron=1e-5 roff=0.1 von=5.10 voff=3.10) .model s1bmod vswitch (ron=1e-5 roff=0.1 von=3.10 voff=5.10) .model s2amod vswitch (ron=1e-5 roff=0.1 von=2.1 voff=-2.9) .model s2bmod vswitch (ron=1e-5 roff=0.1 von=-2.9 voff=2.1) .ends note: for further discussion of the pspice model consult a new pspice sub-circuit for the power mosfet featuring global temperat ure options; written by william j. hepp and c. frank wheatley. mos1 10 dplcap rdrain dbreak ldrain drain lsource dbody rsource ebreak mos2 rin cin vto esg ca evto rgate gate lgate 5 2 11 21 8 6 16 20 9 1 18 8 6 8 17 18 + - + - + - + - 3 source rbreak rvto vbat + - 19 it eds egs s1a s2a s2b s1b cb 18 17 7 12 15 14 13 13 8 14 13 5 8 + - + - 5 51 rscl2 rscl1 escl desd2 desd1 91 6 8 rfd8p06e, RFD8P06ESM, rfp8p06e
disclaimer fairchild semiconductor reserves the right to make changes without further notice t o any products herein t o improve reliability , function or design. fairchild does not assume any liability arising out of the applica tion or use of any product or circuit described herein; neither does it convey any license under its p a tent rights, nor the rights of others. trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production optologic? optoplanar? pacman? pop? power247? powertrench qfet? qs? qt optoelectronics? quiet series? silent switcher fast fastr? frfet? globaloptoisolator? gto? hisec? isoplanar? littlefet? microfet? micropak? microwire? rev. h4 a acex? bottomless? coolfet? crossvolt ? densetrench? dome? ecospark? e 2 cmos tm ensigna tm fact? fact quiet series? smart start? star*power? stealth? supersot?-3 supersot?-6 supersot?-8 syncfet? tinylogic? trutranslation? uhc? ultrafet a a a star*power is used under license vcx?
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